The disclosed embodiments of the present invention relate to signal processing with quantization involved therein, and more particularly, to a quantization circuit having a VCO-based quantizer compensated in a phase domain and related quantization method and continuous-time delta-sigma analog-to-digital converter.
Delta-sigma analog-to-digital converters have become very popular because they overcome some of inherent problems of conventional analog-to-digital converters. Conventional analog-to-digital converters favorably sample at the lowest sampling frequency, but inconveniently require highly accurate analog circuitry. In contrast, the delta-sigma analog-to-digital converters relax the requirements on analog circuitry. This benefit is gained at the tolerable expense of higher sampling frequency and more stringent digital signal processing. By over-sampling the input signal, applying coarse quantization and shaping the quantization noise spectrum, the delta-sigma analog-to-digital converters can provide high resolution in a relative small bandwidth.
Most often, the delta-sigma analog-to-digital converters are implemented with the use of discrete topologies. However, the input bandwidth is limited by the speed at which the loop filter can operate. The use of the continuous-time delta-sigma analog-to-digital converters provides some improvements. The advantage lies in the fact that no sampling is performed within the filter, so the restriction of the maximum sampling frequency is only imposed on the sampler within the quantizer. However, the continuous-time delta-sigma analog-to-digital converter exhibits several non-idealities, such as excess loop delay. Ideally, the digital-to-analog converter (DAC) disposed at the feedback path should respond immediately to the quantizer clock edge. Actually, the non-zero transistor switching time of the quantizer and the DAC results in a finite delay between the quantizer and the DAC, leading to the unwanted excess loop delay. As the timing errors are continuously accumulated at the integrator through the feedback DAC, the overall signal and noise transfer function of the continuous-time delta-sigma analog-to-digital converter is shifted from the desired one. Thus, there is a need for a compensation scheme of the excess loop delay existing in the continuous-time delta-sigma analog-to-digital converter.